| 摘要 |
PURPOSE:To simplify a system by designating the bit position of stored data in the address signal of a memory plane of RAMs, updating the contents of a bit, and designates the contents of the update upon when necessary. CONSTITUTION:A memory control circuit 10 when receiving a data modification command MDF from a bus 2 switches a switch (SW) 43 to connect a bus 55 to a bus 57, also switches an SW41 to connect a data line 50 to 52, and places the memory plane 20 in a read enable state RE. Consequently, old data D0 is latched 31 in a data updating circuit 30. Updated data D1 is inputted to the updating circuit 30 through the data line 50, SW41, and bus 52, and a bit position designating signal S is also inputted from a bus 58 to the circuit 30. The signal S sets an update position to ''1'' and others to ''0''. The old data D0, new data D1, and signal S are processed, bit by bit, logically by AND circuits 32 and 33, an OR circuit 34, and an inverter 35 to input the updated data D1 to the memory plane 20. Consequently, a data processing time and a bus occupation time are shortened. |
