| 摘要 |
PURPOSE:To vary an eliminated noise width with temperature stability by applying one end of a parallel resistor to one input terminal of a comparator, applying a comparison voltage to the other input terminal and obtaining a comparator output when outputs exceeding a prescribed number of outputs of a shift register are at a high level. CONSTITUTION:An input signal A from an input terminal 21 is sampled by a clock pulse B having a sufficiently shorter period than a signal 22 from an input terminal 22 and becomes outputs Q1-Q4 of the shift register 29. In selecting resistors 24-28 to an identical resistance value and a comparison voltage 23 to 1/2 of a high level VDD, the output signal goes to a high level by a comparator 30 and goes to a low level in other case. Thus, since the output exceeds the 1/2VDD at the input terminal 23 when >=3 samplings among the four samplings are at high level only, i.e., when 3/5VDD is applied to the input terminal 32 because of majority decision, the signal is outputted as a high level. |
