| 摘要 |
PURPOSE:To contrive accomplishment of high degree of integration and low power consumption by a method wherein a continuous oscillation pulse and the pulse which is formed based on the operational timing pulse of said oscillation pulse are rectified respectively, thereby enabling to obtain the substrate bias voltage having the current supply capacity corresponding to the operation of said pulses respectively. CONSTITUTION:A pulse phic is delayed by a resistor R1 and a capacitor C4, it is inputted to one end of an OR gate OR1, and an output phi1 is rectified using a capacitor C2 and the FETs Q3 and Q4 of diode connection. phi2 is also rectified using the same circuit as above, and it is added to the substrate back bias -Vbb obtained by rectifying a continuous oscillation output phiosc. When phic(phi2) is changed to ''1'', phi1(phi2) is turned to ''1'', but phic' is delayed, and it maintains ''1'' even when phic(phi2) is changed to ''0'', when phic'(phi2') is changed to ''0'', phi1(phi2) is turned to ''0'', phic and phi2 are increased in pulse width and turned to phi1(phi2), and the charging period of capacitors C2 and C3 can be secured. Thus, the necessary current supply capacity can be set in accordance with the operational mode by phic and phi2, and the power consumption of a substrate bias generating circuit is reduced, thereby enabling to obtain a high integration memory wherein a substrate bias circuit is built-in using C1-C3 of the irreducible minimum capacity. |
