发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To enable to detect unsatisfactory products by performing a DC inspection only by a method wherein the prescribed wiring is formed within a divided circuit block using a wiring layer having relatively high resistance, a metal wiring is provided in parallel wth said wiring, it is connected to a point of the wiring layer of each block, and the signal delay is shortened. CONSTITUTION:The gate of the memory element Qm located in the same row is connected to word wires W0 and W1 using a conductive poly Si layer PSi which is formed in one body with a gate electrode, an Al layer A12 is arranged in parallel with the second layer of the same row, and it is connected to a layer PSi at a point. Also, the source electrode of the element Qm is connected to a common diffusion layer, and it is connected to the earthing conductor GND at a point using an Al layer A11 of the first layer in the same direction as a data wire D. Also, the drain of the element Qm in the same row is connected respectively to the data wire D0-D7 using a layer A11. According to this constitution, a signal is supplied to the Al layer for each of the divided circuit element, and the propagation period of time can be reduced, thereby enabling to detect the unsatisfactory products by performing a DC operational inspection, because no signal is propagated on the far end side when the Al layer is disconnected.
申请公布号 JPS6028261(A) 申请公布日期 1985.02.13
申请号 JP19830135815 申请日期 1983.07.27
申请人 HITACHI SEISAKUSHO KK 发明人 UCHIDA MAKIO
分类号 G11C17/00;G11C17/12;G11C29/00;G11C29/12;H01L21/3205;H01L21/66;H01L21/82;H01L21/8246;H01L23/52;H01L27/10;H01L27/108;H01L27/112 主分类号 G11C17/00
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