发明名称 VARIABLE DELAY CIRCUIT
摘要 <p>PURPOSE:To eliminate glitch generated from a D/A converter by adding an amplitude slice circuit. CONSTITUTION:The amplitude slice circuit consists of a resistor 25 and a Schottky barrier diode (SBD) 16 and eliminates glitch generated at A/D conversion. The resistor 25 separates an input and an output when the diode 16 is turned on and an output voltage 44 is kept constant. When the input signal is a reference voltage VR' (a reference voltage to slice glitch exceeding a high level of the input signal 42) decided by a voltage drop VF of the SBD16 and a constant voltage VR or below, the SBD16 becomes a high resistance state and the input voltage appears at the output as it is. If the reference voltage is the reference voltage VR' or over because of the glitch generated at the A/D conversion, the SBD reaches the forward low resistance state and the output voltage becomes the reference voltage VR'. That is, the output voltage eliminating the glitch component exceeding the VR' is obtained.</p>
申请公布号 JPS6028322(A) 申请公布日期 1985.02.13
申请号 JP19830135831 申请日期 1983.07.27
申请人 HITACHI SEISAKUSHO KK 发明人 OOSAKI AKIO
分类号 H03K5/13;H03M1/08;(IPC1-7):H03K5/13 主分类号 H03K5/13
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