发明名称 SEMICONDUCTOR MEMORY ELEMENT
摘要 PURPOSE:To contrive the increase in capacity per unit area by a method wherein capacitors to be used for information are laminated on an Si substrate in three-dimensional form and they are connected in parallel. CONSTITUTION:An aperture is provided on an SiO2 thin film 52, the surface of a P type Si substrate 51 is isolated using a P-layer 54, and a P-added poly Si pattern 55 is formed on the SiO2 film 52 adjoining to the N<+> layer which is selectively provided. An interlayer isolation is performed using Si3N456, and a P-added poly Si pattern 57 is superposed. Then, an SiO2 thin film 58 and a conductive poly Si59 are deposited, a patterning is performed, and an N<+> layer 60 is formed by introducing As using poly Si layer 57 as a mask. As Al wiring 63 is formed by covering PSG61 and providing an aperture 62, the above is covered by a protective film, and the memory element is completed. According to this constitution, as two capacitors are connected in parallel and it has a three-dimensionally superposed structure, its capacity per unit area can be increased and this is extremely advantageous for formation of a high density memory element.
申请公布号 JPS6028260(A) 申请公布日期 1985.02.13
申请号 JP19830135236 申请日期 1983.07.26
申请人 OKI DENKI KOGYO KK 发明人 KITA AKIO;INO MASAYOSHI
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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