| 摘要 |
A modulating circuit (10) receives a UHF carrier signal together with a digital input signal for data along with a data clock. A channelizer circuit (60) produces I and Q channel digital data signals derived from the digital input signal. The I and Q channel signals are utilized to trigger one shot circuits (70, 72, 74 and 76) to produce positive and negative pulses corresponding to the signal transitions of the input signals thereto. These pulse signals are provided to integrate and hold circuits (80, 82) which serve to have positive and negative integration, thereby producing ramp signal segments in place of the sudden transitions of the rectangular digital input signals. The resulting data signals from the integration process are passed through diode shaper circuits (82, 92) and low pass filters (88, 94) to produce spectrum shaped I and Q channel modulating signals which have a limited bandwidth. The modulating signals are input to mixers (36, 40) together with respective in-phase and quadrature phase carrier signals to provide amplitude and phase modulation of the carrier signals. The resulting amplitude and phase modulated carrier signals are combined in a summation circuit (44) to produce a resulting modulated, band limited carrier signal.
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