| 摘要 |
PURPOSE:To decrease the power consumption at stand-by state by constituting a latch circuit for an output side only of a clocked inverter turned off at the stand-by state in a flip-flop using the clocked inverter. CONSTITUTION:The latch circuit is constituted by an inverter 36 and an inverter 38 controlled with a control signal CNTL and provided to an output side of the clocked inverter 35 turned off at the stand-by state in a CMOS dynamic D flip- flop comprising the clocked inverters 32, 25 and the inverters 32, 36. The inverter 38 is turned off at the operating state and the FF acts like the dynamic type FF and the inverter 38 is turned on at the stand-by state and the FF latches a signal. Since the input potential of the inverter 36 at the stand-by state does not reach the intermediate level, no through-current flows. |
