发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To reduce the variance of a reading transistor threshold by forming a first or second diffusion layer and a second conductor layer through self-alignment in which a first gate electrode and a second gate electrode are used as masks. CONSTITUTION:A field oxide film 16 and an inversion preventive layer 16' for a P type impurity region are formed to a P type semiconductor substrate 9, first gate oxide films 20 are formed, first polysilicon layers 21 are attached, and a first gate electrode 221 as a gate for a writing transistor and a second gate electrode 222 as a gate for a reading transistor are shaped to sections separated at a regular interval. Upper surface oxide films 23, 23 are formed, and a second gate oxide film 24 is formed. A second polysilicon layer 25 is shaped on the second gate oxide film 24 between the gate electrodes so as to coat a section between the electrodes. Phosphorus is diffused into the substrate 9 to each form first and second diffusion regions 271, 272 as a writing line and a data line.
申请公布号 JPS6025268(A) 申请公布日期 1985.02.08
申请号 JP19830133261 申请日期 1983.07.21
申请人 TOSHIBA KK 发明人 KUMANOMIDOU TAKATAKE;OGURA ISAO
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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