| 摘要 |
PURPOSE:To achieve the reduction in current consumption by stopping oscillation when a reset state is allowed to stand, by simple constitution wherein automatic oscillation stoppage is controlled by a frequency divider circuit of which the reset release is controlled by a reset switch. CONSTITUTION:When a reset switch 11 is turned ON, the outputs of FF12-14 are successively brought to 1 and FF5 is reset through a NOR gate 18 to prevent the revolution of a stepping motor. On the other hand, a frequency divider circuit 15 of which the reset is released through an inverter simultaneously with the turning-ON of a switch 11 responds to the output of a frequency divider circuit 4 to generate high level output after a predetermined time is elapsed from the turning-ON time of the switch 11 and the output of a NAND gate 2 is reversed to a low level to stop the oscillation of an oscillator circuit 1. Therefore, by simple constitution, reset for time setting is normally performed and oscillation is automatically stopped when a reset state is allowed to stand to make it possible to attain the reduction in current consumption. |
