发明名称 JOSEPHSON FREQUENCY MULTIPLIER CIRCUIT
摘要 PURPOSE:To simplify the constitution by supplying an alternate signal current and an alternate bias current to an alternate pulse current generating circuit in a multiplier circuit using a Josephson junction circuit. CONSTITUTION:The alternate signal current A1 supplied to an alternate signal current input line 12 and the alternate bias current B applied to an alternate bias current input line 13 are applied to the alternate pulse current generating circuit U1. Thus, positive and negative alterate pulse currents P1-P4 having a time width tau until points of time TD1-TD4 delayed by a delay time tau of an alternate signal current delay circuit 27 are obtained respectively from points of time T1-T4 at each period of an alternate signal current A1 from an alternate pulse current output line 14. Since the output line 14 of alternate pulse current generating circuits U1-Un is coupled to an output line Hj via resistors Rj1-Rjn, an alternate pulse current PP where the frequency is multiplied by (n) is obtained to an alternate signal current A0 from the alternate signal source 1.
申请公布号 JPS6021619(A) 申请公布日期 1985.02.04
申请号 JP19830130072 申请日期 1983.07.16
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 OOHATA MASANOBU;ICHINOMIYA YOSHICHIKA;ISHIDA AKIRA
分类号 H03K5/00 主分类号 H03K5/00
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