发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To suppress dispersion of interlayer capacitance between gate electrodes at a semiconductor device having multilayer electrode structure by a method wherein a first insulating film pattern is protected by a second insulating film pattern, and a third insulating film provided thereon is etched according to anisotropic etching. CONSTITUTION:After a first gate oxide film 23 is formed, a first polycrystalline silicon film 24, a first insulating film 25 and an Si3N4 film (second insulating film) 26 are deposited in order. The films thereof are patterned in order according to reactive ion etching using a photo resist pattern as a mask in succession to form a first gate electrode 27, an oxide film pattern 28 and an Si3N4 film pattern 29. Then a third insulating film 30 is deposited. The oxide film 30 thereof and the oxide film 23 existing thereunder and etched to expose a substrate 21. As a result, remaining CVD oxide films 31 are formed at the sides of the gate electrode 27. Accordingly, when the remaining CVD oxide films 31 are formed at the sides of the gate electrode 27, because the film pattern 29 is existing under the oxide film 30, reduction of film thickness of the oxide film pattern 28 on the gate electrode 27 can be checked.
申请公布号 JPS6020563(A) 申请公布日期 1985.02.01
申请号 JP19830128246 申请日期 1983.07.14
申请人 TOSHIBA KK 发明人 SAWADA SHIZUO
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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