| 摘要 |
PURPOSE:To contrive to reduce series resistance, and to improve alignment property an integrated circuit at an FET and integrated circuit structure containing the FET thereof by a method wherein a low impurity concentration region is made thick, and regions to isolate the drain region are provided. CONSTITUTION:After boron ions are implanted at the rate of 5X10<15>piece/cm<2> to the top part of a width-type substrate 1 of 20OMEGA.cm resistivity, an N type layer 9 of 15OMEGA.cm resistivity is formed at 9mum thickness according to the usual epitaxial growth method. P type layers 11 are formed by diffusion at 4mum depth in succession, and moreover N type layers 12, 13 are formed by diffusion at 2mum depth. Because formation of the P type layers 11 is performed by thermal diffusion at a comparatively high temperature, implanted boron ions diffuse during heat treatments of both of formation of the P type layers and epitaxial growth of the N type layer 9 to form P type regions 10. Namely, the layer 9 is isolated according to the P type regions 10, 11. Accordingly, the low impurity concentration layer 9 can be made thick by the amount of thickness isolating the drain region according to the regions buried in the substrate, therefore improvement of series resistance can be attained. Accordingly, series resistance of the MOSFET can be reduced, and moreover integration of a bipolar transistor can be attained easily. |
