发明名称
摘要 PURPOSE:To improve the processing efficiency of a CPU, by storing data directly without intervention of a common bus. CONSTITUTION:In a digital operation control device, data received by a terminal unit 11 is stored directly in a data storage device 21, and the data storage device 21 and a CPU14 are connected through a common bus 15. The data storage device 21 has a random access memory and an address converting circuit to fetch data repeatedly and is provided with various error checking circuits also to check errors for the receiving of input data so that the operation processing in the CPU 14 is continued without hindrance.
申请公布号 JPS6156827(B2) 申请公布日期 1986.12.04
申请号 JP19810052352 申请日期 1981.04.09
申请人 FUJI DENKI KK;FUJI FUAKOMU SEIGYO KK 发明人 ISHII TAKESHI;NAKAJIMA CHIHIRO;IHARAKI EIJIRO
分类号 G06F13/12;G06F5/10;G06F13/00;G06F13/22;G06F17/40;H04L29/04 主分类号 G06F13/12
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