发明名称 MULTIPLEX AND EXCLUSIVE INPUT AND OUTPUT CONTROLLER
摘要 PURPOSE:To simplify the structure of a multiplex and exclusive input/output controller by using a priority decision/control circuit to select and process the control signal given from a control signal receiver circuit and a unit of data processing hardware. CONSTITUTION:In a data output processing mode, a priority decision/control circuit 38 prevents an input control signal 49 given from a control signal receiver 36 and also transmits the control signal to the data processing hardware 39. Receiving the control signal, the hardware 39 reads the data out of an external memory unit 42 and transfers the output data signals 55 read out successively to transmission data driver circuits 41 and 46. In this case, however, an interface enable signal 51 is reset, only an output data signal interface 65 operates to transfer data. the input processing is also carried out via the circuit 38 in the same way. This simplifies the algorithm of data processing hardware and then the structure of a multiplex and exclusive input/output controller is made concise.
申请公布号 JPS6019266(A) 申请公布日期 1985.01.31
申请号 JP19830127165 申请日期 1983.07.12
申请人 NIPPON DENKI KK 发明人 SATOU TOMIJI
分类号 G06F13/12;G06F13/14;(IPC1-7):G06F13/14 主分类号 G06F13/12
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