发明名称 DIGITAL TELEVISION RECEIVER
摘要 PURPOSE:To simplify the constitution of a PLL circuit by using a multiplier used to the PLL circuit also to a contrast circuit. CONSTITUTION:A multiplier 226 which is used to a contrast circuit 400 is used also to a PLL circuit 401 for a digital TV device which uses a PLL circuit for control of the sample phase. That is, two multiplexers 411 and 412 are provided at the input side of the multiplier 226, and a luminance signal 224 and a contrast control signal 225 are selected in a picture period. Then a new luminance signal 227 is delivered from the multiplier 226. While a hue signal 215 and an error signal 405 of the circuit 401 are selected within a horizontal flyback time, and the multiplier 226 is used also to the circuit 401. The circuit 401 controls the sample phase of an A/D converter 207 by the output 210 of a phase wave detection circuit 209 containing the multiplier 226.
申请公布号 JPS6018085(A) 申请公布日期 1985.01.30
申请号 JP19830125408 申请日期 1983.07.12
申请人 TOSHIBA KK 发明人 NAKAGAWA MASAKI;SUZUKI SUSUMU
分类号 H04N9/44;H04N9/64;(IPC1-7):H04N9/44 主分类号 H04N9/44
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