发明名称 DIGITAL OSCILLATING CIRCUIT
摘要 PURPOSE:To obtain the waveform data of an optional frequency for each clock pulse by using a counter circuit which uses a memory circuit as an element that delivers the residue obtained by dividing an address by a fixed value as the address data. CONSTITUTION:The outputs of constant setting circuits 10-12 which set different count step values are led to a set value switching circuit 20. The selected one of these values is supplied to an adder 30. The adder 30 adds this set value to the count value held at a latch circuit 32. The circuit 32 holds the present count value and at the same time gives this value to a waveform memory circuit 40 in the form an address. The output of the adder 30 is connected to the input of a residue memory circuit 31. The residue obtained by dividing the address value by a fixed value is stored to each address of the circuit 31 as data.
申请公布号 JPS6018005(A) 申请公布日期 1985.01.30
申请号 JP19830126582 申请日期 1983.07.12
申请人 NIPPON DENKI KK 发明人 SUZUKI MASAAKI
分类号 H03B28/00;G06F1/03;(IPC1-7):H03B28/00 主分类号 H03B28/00
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