| 摘要 |
PURPOSE:To improve the packaging density as a whole by detecting a change in an address input signal and generating an internal RAS system and CAS system clock or a timing pulse so as to decrease the number of pins of a large capacity memory thereby miniaturizing the package. CONSTITUTION:A row address strobe CAS generating circuit 13 taking a column address strobe RAS from a pin P14 and a special signal obtained from a pin P1 to which an address signal A0 is impressed as two inputs is provided at the inside of the IC so as to obtain a strobe signal CAS. Any one of address signals A0-A6 are used as the special signal and it is required to provide a level different from the address signal level. Thus, the row selection is conducted during the VOL level of the RAS signal by incorporating in advance the special signal (# part of Asi in Fig.) to, e.g., the first address A0 among the address signals group A0-A6, and the row strobe signal CAS is generated by the CAS generating circuit 13 when the part # of the Asi is incoming with a prescribed time of delay so as to select the row. |
