发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To reduce voltage noise without saturating an input transistor (TR) by using a rectifier element provided with a voltage clamp capability to an input signal voltage. CONSTITUTION:A collector potential change Vc of a drive current specifying TRQs when a signal at an input signal application terminal IN is changed largely from a low level to a high level selects a value of a voltage between the anode and cathode of a clamp diode Dc and a terminal voltage V7 approximately in a range possible for normal logical operation and sets it to be minimized. It is possible to keep a high speed logical operation without saturating an input TRQ1 to a large input amplitude and a voltage noise at a constant voltage application terminal 6 induced through a junction capacitance between the collector and base of the TRQs is reduced remarkably.
申请公布号 JPS6016729(A) 申请公布日期 1985.01.28
申请号 JP19830045479 申请日期 1983.03.18
申请人 NIPPON DENKI KK 发明人 HIRANO YOUJI
分类号 H03K19/086;H03K19/003;(IPC1-7):H03K19/086 主分类号 H03K19/086
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