| 摘要 |
PURPOSE:To miniaturize a cipher by performing ciphering and decoding of transmission/ reception data in terms of time division by one arithmetic part by using a transmission/ reception clock having an identical period. CONSTITUTION:Transmission data of a plain message sent from a data terminal 15 is inputed to an input register 2 and reception data of a ciphered message sent through an MODEM16 from an opposite terminal is inputted to an input register 6 respectively. The plain message and the ciphered message from the registers 2, 6 are inputted to a selection circuit 24 with transmission and reception clocks i1, i2 and a clock i2' waveform-shaped at a control circuit 28 while changing the phase. The plain message and the ciphered message are read alternately from the circuit 24 by a selecting signal (f) from a control section 27, inputted to a DES operating section 25, which converts the plain message into the ciphered message at the leading edge of a selecting signal (h) multiplying the signal (f) twice and converts the ciphered message into the plain message at the next leading edge and inputs the result to a selecting circuit 26. The circuit 26 inputs the ciphered message at the trailing edge of the signal (h) and the plain message at the next trailing edge to output registers 4, 22 respectively. The ciphered message and the plain message of the registers 4, 22 are transmitted respectively to an MODEM16 and the terminal device 15 by the clocks i1, i2'. |
