发明名称 STORAGE DEVICE
摘要 PURPOSE:To decrease the test time required for complete propriety decision by constituting a memory array dividedly into plural mats and providing a terminal for output observation to each memory mat to access all memory mats at the same time. CONSTITUTION:The memory array 1 is divided into four memory mats 1a-1d where a 16-kbit memory cell is arranged in matrix. A buffer circuit 11 giving an output to an observing pads 13a-13d as observing terminals provided corresponding to the memory mats 1a-1d is provided respectively. In touching a probe to an input pad 13e of a test control signal and impressing a prescribed test control signal, all read/write circuits 8a-8d are activated and all the memory mats are accessed at the same time thereby conducting date read and write.
申请公布号 JPS6015899(A) 申请公布日期 1985.01.26
申请号 JP19830123272 申请日期 1983.07.08
申请人 HITACHI MAIKURO COMPUTER ENGINEERING KK;HITACHI SEISAKUSHO KK 发明人 NAGASE AKIRA
分类号 G11C29/00;G01R31/28;G06F11/267;G11C11/401;G11C29/08;G11C29/34;(IPC1-7):G11C29/00 主分类号 G11C29/00
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