Data processing system having dual processors.

摘要

The data processing system comprises a host processor (101) and an attached processor (106). Each processor is capable of executing user programs under a different operating system and each processor is capable of accessing a system memory (103) but the host processor controls and performs all input and output operations for both processors. The system memory (103) is shared by the processors; therefore only one processor is active on the bus system at any given time. Control logic is disclosed for holding the host processor (101) and starting the attached processor (106) upon a command from the host and for holding the attached processor and starting the host in the event of interrupt conditions, attempted access by the attached processor to protected areas of memory, or execution of an "out" instruction by the attached processor. Memory mapping logic (102) is under host control, but provides mapping for both the host and attached processors.