| 摘要 |
PURPOSE:To keep a low resistance value even in the presence of inclination of a wiring layer by a method wherein a III-V group semiconductor layer is grown on recess and mesa parts formed in a semi-insulation III-V group compound substrate, where semiconductor elements are formed, and then an N<+> type III-V group semiconductor layer containing Sn and N type impurity is used in connection of the recess part to the mesa part by means of a wiring layer. CONSTITUTION:The semi-insulation GaAs substrate 1 is etched by the adoption of a normal photo lithography technique, resulting in the formation of the recesses R and mesas M. Next an N<+> type GaAs layer 2 is grown over the entire surface including these by a molecular ray epitaxial method, where the semiconductor elements are formed, and the layer 2 is used also as the wiring layer for these elements. In this construction, the layer 2 is formed of a semiconductor containing Sn, having the impurity concentration at about 5X10<18>/cm<3>, and electrodes 3 and 4 are mounted on a mesa M and a recess R, respectively. The thickness of the layer in the part of inclination is made nearly equal to that in the other part in such a manner, so that the resistance value does not increase. |
