发明名称 DIAGNOSIS FACILITATING CIRCUIT
摘要 PURPOSE:To facilitate the diagnosing of an internal logic gate with the minimum diagnosing pins by dividing a highly packaged integrated circuit into several diagnosing blocks to be controlled with a control circuit through a selector provided therebetween. CONSTITUTION:First, when a logic gate of a first diagnosing block 1 is diagnosed, after first to third selectors 4-6 are turned to input terminals (b), (c) and (e) respectively, a diagnosing signal is inputted from an input signal pin P1 and the results of a diagnosis can be observed with an output signal pin P2. Then, when diagnosing the second diagnosing block 2, likewise, after the first to third selectors 4-6 are turned to input terminals (a), (d) and (e), a diagnosing signal is inputted into the second diagnosing block 2 and the results of diagnosis can be observed with the output signal pin P2. Controlling the selectors in this manner enables the common use of an actual signal input/output pin for a diagnosing input/output pin to facilitate the diagnosing of an internal logic gate with the mimimum diagnosing pins.
申请公布号 JPS6013266(A) 申请公布日期 1985.01.23
申请号 JP19830120369 申请日期 1983.07.04
申请人 HITACHI SEISAKUSHO KK 发明人 SEKIHARA SHINJI;TOMOOKA KEIJI;MINE HIROSHI
分类号 G01R31/28;G06F11/267;(IPC1-7):G01R31/28 主分类号 G01R31/28
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