发明名称 COMPARATOR
摘要 PURPOSE:To ensure a stable hysteresis regardless of the level of comparison voltage by clamping the fed-back voltage to a fixed level. CONSTITUTION:A voltage generating circuit 7 produces two voltages (V1+V5) and (V1-V6) from the voltage V1 applied to a comparison input terminal 1, where V5 and V6 show the voltage of constant voltage elements 73 and 74 respectively. These two types of voltage are connected to diodes 81 and 82 of a voltage clamping circuit 8 respectively. Therefore DELTAV<-> and DELTAV<+> are set at the levels as shown in the equations. In the shown equations, R1 and R3 show the resistance values of feedback resistances 3 and 4 respectively, and Vf shows the forward dropping voltage of diodes 81 and 82 respectively. Thus both DELTAV<-> and DELTAV<+> depend on only the fixed voltage such as V5, V6 and Vf, and are never changed by the level of the voltage V1.
申请公布号 JPS609216(A) 申请公布日期 1985.01.18
申请号 JP19830117566 申请日期 1983.06.28
申请人 MATSUSHITA DENKI SANGYO KK 发明人 IKEDA MASAHARU
分类号 H03K3/0233;(IPC1-7):H03K3/023 主分类号 H03K3/0233
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