| 摘要 |
PURPOSE:To eliminate the delay of access to facilitate applying this system to an already existing system by branching and reading information between an arithmetic unit and a memory from a transmission line and comparing this information with preliminarily prepared information and discriminating information by the comparison result and reporting abnormality to the arithmetic unit in case of abnormality. CONSTITUTION:Address information is read into a write inhibit area designating table 31 of a memory protecting circuit 3 from an address bus 4 between the arithmetic unit and the memory through a monitor line 6, and a read/write signal is inputted to a destruction detecting circuit 32 of the circuit 3 from a control line 5 between the arithmetic unit and the memory through the line 6, and address information is compared with preliminarily written write permission addresses and write inhibition addresses in the table 31. A write inhibiting signal of the table 31 passes through the circuit 32 to an abnormality reporting line 7 by the trailing edge of the input from the line 6 to report abnormality of transmission information to the arithmetic unit. |
