发明名称 Phase-locked loop
摘要 In a phase-locked loop, the output of a digital phase comparator is connected to the control input of a change-over switch, the input of which is connected to a pulse generator. One output of the change-over switch is connected to the up-counting and the other output is connected to the down-counting input of a counter. The N outputs of the counter are connected to the N inputs of a switching matrix, the output of which is connected to the input of a voltage-controlled oscillator. The output of the voltage-controlled oscillator is connected to one input of the phase comparator whilst a signal with a reference frequency is present at its other input.
申请公布号 DE3324919(A1) 申请公布日期 1985.01.17
申请号 DE19833324919 申请日期 1983.07.09
申请人 PHILIPS PATENTVERWALTUNG GMBH 发明人 SCHEMMEL,HANS-ROBERT,DIPL.-ING.
分类号 H03L7/085;H03L7/14;(IPC1-7):H03L7/08 主分类号 H03L7/085
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