| 摘要 |
PURPOSE:To improve the reliability of the traced data by storing even a parity error signal to a trace memory. CONSTITUTION:A CPU1 selects a main memory 2 and an I/O3 through an address bus 7. The data is transferred among the CPU1, the memory 2 and the I/O3 via a data bus 8. In this case, a parity signal is added to the data in order to detect a code error which is produced during the transfer of data. The data to be traced and its parity signal are stored in a trace memory 4. Then the stored data is reproduced by a trace memory reproducer 5 and recorded to a measuring device 6. |
