发明名称 Storage control apparatus.
摘要 <p>A storage control apparatus for sequentially reading out each data element of vector data stored in a main storage unit (1-1-1) and for writing the readout data elements sequentially in the corresponding register elements of the vector register (VR1) disposed in a vector processor is disclosed. In the apparatus only the data element indicated as the write data by the mask information among the readout data elements are stored from the main storage unit (1-1-1) to the pertinent register elements of the vector register (VR1) in the vector processor based on the mask information which indicates whether or not the write operation is required (for example, "1" indicates that the write operation is necessary and "0" indicates that the write operation is unnecessary). When the mask information indicates that the write operation is not required, the storage control apparatus controls operations to prevent the memory bank of the main storage from being set to the busy state, thereby eliminating the memory bank conflict which should not take place in accordance with the intrinsic system characteristics. </p>
申请公布号 EP0131284(A2) 申请公布日期 1985.01.16
申请号 EP19840107937 申请日期 1984.07.06
申请人 HITACHI, LTD. 发明人 OMODA, KOICHIRO;NAGASHIMA, SHIGEO
分类号 G06F17/16;G06F15/78;(IPC1-7):G06F15/347 主分类号 G06F17/16
代理机构 代理人
主权项
地址