发明名称 DATA TRANSFER SYSTEM BETWEEN MICROPROCESSORS
摘要 PURPOSE:To transfer data at a high speed by securing the optional connection between plural microprocessors and memory parts of the same number as those microprocessors with the open/close control for the cross points of data buses arrayed in a grid form. CONSTITUTION:Microprocessors 11-13 and memory parts 21-23 are connected to data buses 41-43 and 51-53 which are arrayed in a grid form. Then these microprocessors can be optionally connected to the memory parts by opening and closing the cross point switches 611-613, 621-623, 631-633, etc. In a data writing mode, the data is transferred simultaneously to plural memory parts from a microprocessor. When the data of each microprocessor is used, one among the memory parts is used as an exclusive memory part to read the transfer data.
申请公布号 JPS607565(A) 申请公布日期 1985.01.16
申请号 JP19830115220 申请日期 1983.06.28
申请人 NIPPON DENKI KK 发明人 SAIJIYOU MITSUO
分类号 G06F15/167;G06F15/173;(IPC1-7):G06F15/16 主分类号 G06F15/167
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