发明名称 FAULT END CONTROL SYSTEM UNDER FAULT END PROCESSING
摘要 PURPOSE:To promote debugging by skipping the block where a fault end phenomenon is produced during fault end processing to carry out the processing up to the final block and deciding the factor of the first fault end. CONSTITUTION:When a fault end phenomenon arises, control is delivered to an OS and then to an FORTRAN library designated as an outlet routine. Then a fault end processing module is loaded to register the fault end outlet in preparation for a fact that a fault end is given again during the fault end processing. The processing block is executed after calling out a control routine, and the processing is continued up to the last block. If a fault end phenomenon arises at the middle of processing, control is handed to the outlet registered at a fault end processing control part 4. The fault end outlet is registered again in preparation for the second occurrence of the fault end phenomenon. Then the occurring frequencies are counted for the fault end, and an endless loop of the processing is avoided.
申请公布号 JPS607541(A) 申请公布日期 1985.01.16
申请号 JP19830115615 申请日期 1983.06.27
申请人 FUJITSU KK 发明人 HORIGUCHI HIROKAZU
分类号 G06F11/00;G06F9/06;G06F11/36 主分类号 G06F11/00
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