发明名称 SEMICONDUCTOR CIRCUIT
摘要 <p>PURPOSE:To prevent a memory element or the like formed like a matrix from the inflow of short-circuit current at the connection of a power supply by clamping an output control signal at the connection of the power supply. CONSTITUTION:The voltage of a node N5 of an output disable circuit 13 is increased through a depression transistor (TR) Q14 in accordance with the rise of power supply voltage VCC and a TR Q15 is turned on. Even if a column enable signal CE applied to a bootstrap circuit 111 in a data output enable buffer 11 is ascended, an output enable signal OE outputted from an output enable signal generating circuit 112 is clamped to earth low potential. Consequently, a data OUT and an OUT' from a data output buffer 12 are turned to the low levels independently of the potential of a data line D and a D', TRs Q23, Q24 are turned off and the terminal of output data DO is turned to high impedance, so that short-circuit current does not flow even if plural memory elements are coupled.</p>
申请公布号 JPS607689(A) 申请公布日期 1985.01.16
申请号 JP19830113632 申请日期 1983.06.25
申请人 FUJITSU KK 发明人 TAKEMAE YOSHIHIRO;NOZAKI SHIGEKI;OOHIRA TAKESHI
分类号 G11C11/413;G06F1/26;G11C11/34;G11C11/401;G11C11/409;(IPC1-7):G11C11/34;G06F1/00 主分类号 G11C11/413
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