发明名称 DECIMAL DIVIDER
摘要 PURPOSE:To repeat operations of (divident divisor divident) until excess subtraction occurs to eliminate the necessity of adding correction, by alternately using divident registers in which dividents are set for reading out/writing by switching whenever subtraction is repeated. CONSTITUTION:When calculation enters into a division loop, the content of a quotient register 107 is cleared to ''0''. Then a partial quotient register 2004 is initialized. Thereafter, subtraction of a value set in a divisor register 108 from a value set in a divident register 101 is executed and the result is stored in another divident register 102. When a carry exists, an FF205 makes a toggle operation and, at the same time, the partial quotient register 2004 is updated. Then subtraction of the value set in the divisor register 108 from the value set in the divident register 102 is executed by means of a subtractor 109 and the result is stored in the divident register 101. When a carry exists even in this case, the FF205 makes the toggle operation and the partial quotient register 2004 is updated, and then, change-over of the appointment of the divident registers 101/102 used for reading out and writing is performed.
申请公布号 JPS605340(A) 申请公布日期 1985.01.11
申请号 JP19830113033 申请日期 1983.06.23
申请人 TOSHIBA KK 发明人 HARA SHIYUUICHI
分类号 G06F7/496;G06F7/493;G06F7/508;G06F7/52;G06F7/535;(IPC1-7):G06F7/52 主分类号 G06F7/496
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