| 摘要 |
PURPOSE:To reduce the load of a processor to perform the data logging operation of an information processing device without interrupt phenomena of the processor, by adopting the direct memory access DMA transfer system. CONSTITUTION:In case that a time-out phenomenon of an interval timer circuit 13 is logged, a DMA request designating circuit 15 is turned on when this phenomenon is detected by a time-out detecting circuit 14. Next, the circuit 15 sends a DMA request signal to a DMA control circuit 4, and a DMA response signal is sent from the circuit 4 to an input/output control circuit 3 and a DMA cycle receiving circuit 7. The circuit 7 controls individual parts of the circuit 4 to execute the DMA tranfer operation. That is, a main storage address generating circuit 16 designates a data address of a log object in a main storage circuit 2, and a memory circuit 8 only for logging stores this data through a circuit 2. The DMA transfer system is adopted in this manner to perform data logging operation with the load of the processor reduced. |
