发明名称 INFORMATION CONVERTING SYSTEM
摘要 PURPOSE:To make substantially a DC component to zero and to reduce a restricted bit length by forming the consecution of the same level to <=3 bits in a signal after NRZI modulation and also processing the storage of DC in the bits through proper combination. CONSTITUTION:In converting 6-bit information into 8-bit information, the 8-bit information is formed so that the consecution of the same level is <=3-bit in the signal after NRZI modulation and also the 1st combination where the storage of DC of 8 bits is zero and the 2nd combination where the storage of DC is +2 or -2 are formed, the 6-bit information is allowed to correspond on one-to-one basis to the combination selected by the said condition, and when the 2nd combination is used, the sign of the polarity of the storage of DC is stored, and the 2nd combination receives the information of DC storage until the preceding combination and its head bit is controlled so as to make the DC storage close to 0, and in such information converting system, the DC component is made to zero substantially, the bit error rate is improved and high density recording is attained.
申请公布号 JPS601957(A) 申请公布日期 1985.01.08
申请号 JP19830108863 申请日期 1983.06.17
申请人 SONY KK 发明人 FUKUDA SHINICHI
分类号 H03M7/00;G11B20/14;G11B20/16;H04L25/49;(IPC1-7):H04L25/49 主分类号 H03M7/00
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