| 摘要 |
PURPOSE:To microminiaturize and to enhance the density of a semiconductor integrated circuit by covering a high resistance region required for accuracy through an insulating layer with high potential wiring region sufficient to cover the high resistance region, therby preventing electron immersing effect. CONSTITUTION:An N<-> type semiconductor region 24 is formed on a P type semiconductor substrate 25, P<-> type semiconductor regions 16, 19 are formed in the region 24, and to lead out input terminal wiring electrode, P<+> type semiconductor region 22, 23 are provided. Then, an insulating layer 21 is formed on the region 24, windows are opened, and input terminal wiring electrodes 17, 20 are removed by aluminum. Ground potential wirings 14 are formed as low potential wirings on part on the layer 21, and a wiring region 26 having a power source terminal potential is formed as high potential wirings. This region 26 is covered on the regions 16, 19 to sufficiently provide margins. The immersion of electrons from the wirings 14 to the high potential resistance region is absorbed by the region 26 covered on the regions 16, 19. |
