| 摘要 |
PURPOSE:To execute quick normalizing process by shifting plural bits in a bundle among plural bits at the first time, then changing the shift from plural bits to one bit at a time when the plural-bit shifting is recognized as excess shifting. CONSTITUTION:Output bits a0-an-1 of a register 10 in which decimals are set are connected with the input sides of a 4-bit shift circuit 24 and 1-bit shift circuit 12, and the output of the register 10 is shifted by four bits in a bundle at the circuit 24. Exclusive OR gate groups 32-38 take the exclusive OR of the sign bit a0 of the register 10 and high-order four bits and input the result into an encoder 40 as e0-e3. When all the signals e0-e3 are ''0'', the encoder 40 sets its output signal fa to ''1'' and opens a gate 26 and inputs the output of the circuit 24 into the register 10. When the excess of bits is shifted at the circuit 24 and any one of the signals e1-e3 goes to ''1'', the encoder 40 sets its output signal to ''1'' and switches the shifting operation to the circit 12. Then a gate 28 is opened by means of a signal fb and bits are shifted one by one and inputted into the register 10. When the signal e0 goes to ''1'', the normalization is terminated and an end signal F is outputted. |
