| 摘要 |
PURPOSE:To limit the consecution of a same code to a prescribed value or below by adding a redundancy one bit so as to control a DSV in converting an NRZ signal into an NRZI signal and stopping the control of the DSV when a specific pattern is generated. CONSTITUTION:A serial data Si in 8-bit is inputted to to a serial parallel converting circuit 1, where the data is converted into a parallel data A. The data A is fetched in a latch circuit 2 and the output data B of the latch circuit 2 is fetched to a latch circuit 3. As a result, the data is arranged in the order of C, B, A being a preceding word data. Then the latch data A, B, C are inputted to an entire zero detecting circuit 5 so as to detect the number of consecutive ''0''. A read only memory ROM is worked as a 8-9 NRZI converting circuit 4. If the output data F of the entire zero detecting circuit 5 is ''1'', the control of the DSV is stopped so as to form the redundancy bit as ''1'' and the NRZI conversion is applied by specifying the ROM table, then the consecutive ''0'' after the conversion is inhibited, the bits are limited to a maximum 12-bit and the DSV is controlled. |
