| 摘要 |
PURPOSE:To execute the reproduction of high quality picture of non-interlace system using an IDG head by providing a means to correct the time lag between a two-track reproducing luminance signal and a reproducing chrominance signal and the in-line error of head and to set the amount of delay at a specified value. CONSTITUTION:A variable delay element i.e. a line memory is provided to the delay circuits 5 and 5' of an interlace processing part 11. And also a delay amount setting means consisting of a counter 5e, a switch circuit 5f, an AND gate 5g, an FF 5h, and a control circuit 9, is provided to the part 11. The delay amount of the circuits 5 and 5' are variably set so that the time lag between the two-track reproducing luminance signal and the reproducing chrominance signal reproduced and outputted from an inline double gap IDG head 1, and the inline error are accurately corrected, to form a picture signal for non- interlace picture reproduction.
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