Three-output level logic circuit

摘要

A three-output level logic circuit comprises an output stage and a drive stage for driving the output stage. The output stage includes first and second MOS transistors connected in series between first and second power sources and a terminal is provided for producing three-state output signals. The drive stage includes third to sixth MOS transistors connected in series between the first and second power sources. A terminal is provided for supplying a data signal to the fourth and fifth MOS transistors. A control signal is supplied in common to the gate electrodes of the third to sixth MOS transistors. The conductivity types of the first to sixth MOS transistors are selected to operate the logic circuit with one control signal input and one data signal input.