发明名称 FM DEMODULATION CIRCUIT
摘要 PURPOSE:To obtain the large output voltage even with a low level of power supply voltage by forming a transistor 2-stage cascade constitution for a multiplier constituting an FM demodulation circuit. CONSTITUTION:The input FM signal is supplied to terminals 62 and 63 and limited by transistors (TR)1-3. Then the input signal undergoes a level shift through TRs 4-7 and is supplied to the bases of TRs 28 and 29 of a multiplier 74'. The limiting signal is applied also to an astable multivibrator circuit 72. The signal which is supplied from the circuit 72 with its phase delayed by a fixed time regardless of the degree of frequency change of the input FM signal is impressed to the common base of TRs 14 and 15 of the multiplier 74' via a level shift circuit 73. The H and L levels of the output of a level shift ciucuit 71 which are supplied to the TRs 28 and 29 are set higher and lower than the H and L levels of the output signal of the circuit 73 by a prescribed level. As a result, a signal current flows to the collectors of the TRs 14 and 15 even with a low level of power supply voltage. Then the FM signal is demodulated and delivered via an output circuit 75.
申请公布号 JPS59229906(A) 申请公布日期 1984.12.24
申请号 JP19830104377 申请日期 1983.06.10
申请人 MITSUBISHI DENKI KK 发明人 TOMURO YASUTA
分类号 H03D3/06;H03D3/02;H03D13/00;(IPC1-7):H03D3/02 主分类号 H03D3/06
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