发明名称 MULTIFRAME SYNCHRONOUS TEST SYSTEM
摘要 PURPOSE:To classify and assign a trouble occurring to a time-division exchange, to eliminate the need for a communication between controllers, and to simplify a test by facilitating an autonomous test of multiframe synchronism in a digital signal device. CONSTITUTION:When a selection signal (a) is applied to a selection part 106 while a signal (d) is sent out of an interoffice monitor signal sending circuit 100 to a time-division channel 102, a transmit signal (d) is selected and the contents T of a test time slot are inputted to a shift register 107. The signal contents T circulate by eight bits at every time, so they are sent out to all time slots on a connection bus 110. A receiving circuit 101 selects a signal (f) sent from the channel 102 and a signal (e) sent from a gate 108 through a selector 109. Consequently, the signal contents T are inputted by the receiving circuit 101 at the position of the test time slot. Therefore, the test is taken in normal service without exerting any influence upon other time slots.
申请公布号 JPS59229958(A) 申请公布日期 1984.12.24
申请号 JP19830104131 申请日期 1983.06.13
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KOSHA;OKI DENKI KOGYO KK;NIPPON DENKI KK;FUJITSU KK 发明人 MORI MAKOTO;IWASE YASUMASA;SHIRAISHI YOSHIKATSU;SHIRASAWA SUSUMU;KITAMURA NOBUAKI
分类号 H04J3/14;H04M3/24;H04M3/26;H04Q11/04;(IPC1-7):H04M3/26 主分类号 H04J3/14
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