HOLDING AND OPERATING CIRCUIT OF PARITY

摘要

PURPOSE:To reduce the number of parity generating circuits and parity checking circuits by reserving a parity in the front and back of a parity reserving arithmetic circuit. CONSTITUTION:A parity generating circuit 10 adds a parity bit to input data 1 consisting of m bits and inputs the added data to a parity reserving circuit 20 as the data consisting of (m+1) bits. The output 2 of (m+1) from the parity reserving circuit 20 is inputted to the parity arithmetic circuit 60. The circuit 60 receives the parity bit-added input data 2 consisting of (m+1) bits and outputs a parity-added outout data 3 consisting of (n+1) bits and the data 3 are inputted to a parity reserving circuit 21. The output 4 consisting of (n+1) from the parity reserving circuit 21 is checked by a parity checking circuit 31.