| 摘要 |
PURPOSE:To reduce a layout area by making use of the breakdown of a p-n junction or the breakdown of a gate insulated film of an MOSFET to a memory means which stores a defective address for relief of a defective bit. CONSTITUTION:A load resistance R1 and an MOSFETQ1 serving as a memory means are connected in series between a power supply terminal VCC and the earth potential (0V) of a circuit. The information is stored in response to a fact whether the gate insulated film of the MOSFETQ1 is broken or not. Therefore the gate of the MOSFETQ1 is connected to the resistance R1, and the source and the drain of the MOSFETQ1 are connected the earth potential point of the circuit. A pad P0 for program is also connected to the gate electrode of the MOSFETQ1. That is, the high voltage which breaks the gate insulated film of the FETQ1 is impressed to the pad P0 as long as a defective address signal a0 to be written is set at a high level. If the signal a0 is set at a low level, no high voltage is impressed to the pad P0. Thus the gate insulated film of the MOSFETQ1 is not broken. |
