发明名称 DATA CONTROL SYSTEM
摘要 PURPOSE:To execute a data shift instruction at a high speed by providing a reading register, a positioning device, a switch, etc. within a memory and performing the byte positioning at the memory side a CPU between data of a shift originator and a shift destination. CONSTITUTION:When a data shift instruction is executed, a microprogram corresponding to the shift instruction first obtains a variance 41 between the byte position corresponding to a shift destination address and that corresponding to a shift originator address. Then the variance 41 is obtained in a memory area of a memory and set to a differential register 4 by a microinstruction. The output 40 of the register 4 indicates the number of shafts to an alignment device 3. Then the output 30 is delivered from the device 3 to complete a shift instruction. In such a way, the byte positioning is carried out outside a CPU in case the final word is written twice during execution of a shift instruction. Thus a data shift instruction is executed at a high speed.
申请公布号 JPS59226957(A) 申请公布日期 1984.12.20
申请号 JP19830101163 申请日期 1983.06.07
申请人 NIPPON DENKI KK 发明人 OOTA HIROSHI
分类号 G06F9/30;G06F12/04;G06F13/00 主分类号 G06F9/30
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