| 摘要 |
PURPOSE:To offer a shift register whose processing speed is high, by constituting so that write is executed without complicated procedures such as a shift register apparently by a constitution which has added a few peripheral circuits to an RAM. CONSTITUTION:5 is an FF circuit which is a buffer for holding temporarily a data, 6 is an RAM (random access memory), 7 is a CLKFF which is a clock for giving a timing in case of writing cyclically, 8 is a write pulse generating circuit and constituted of a chain circuit TW, an NOT circuit 9, an NOR circuit 10 and a chain circuit TS, a writable signal WE is outputted to the RAM 6 from the circuit concerned, also delayed by a delaying circuit TAH, outputted to a counter 11, operates the counter 11, an output of the counter 11 concerned and a displacement address DELTAADR (Nbit) from a write pointer given from the outside are added by an adder 12, and its output is sent to the RAM 6 and becomes a read- out address of the RAM 6. When DELTAADR is given, a data is taken from an optional position. |
