| 摘要 |
PURPOSE:To simplify the circuit constitution and at the same time to increase the coding speed of a read Solomon code by providing a sum arithmetic circuit, a product sum arithmetic circuit and plural exclusive OR circuits. CONSTITUTION:The digital data signal supplied to an input terminal T1 is applied to a latch circuit D1, and the output of the circuit D1 is supplied to a sum arithmetic circuit K1 and a product sum arithmetic circuit K2, respectively. The outputs of circuits K1 and K2 are supplied to latch circuits D7 and D13 via exclusive OR circuits ER3 and ER34 respectively. Thus the 1st and 2nd parity signals P1 and P2 are obtained from circuits D7 and D13 respectively and supplied to a latch circuit D14. The digital data signal sent from the circuit D1 is supplied to a latch circuit D15 together with the output of the circuit D14 via latch circuits D10-D12. Thus a code signal is obtained at an output terminal T2 by adding signals P1 and P2 to the word signals forming a unit block of the signal supplied to the terminal T1. Thus the coding speed is increased for a read Solomon code by providing circuits K1, K2, etc. |
