| 摘要 |
A data processing system employing firmware for executing a self test routine each time the system goes through the power-up cycle. The self test firmware provides for compilation of a system configuration map during each execution so that configuration and status data is made available for accessing by the system operation firmware and application software. This enables external systems to set appropriate interrupt vectors and levels and to arrange their physical I/O and device handlers so that various devices within the local system can be accessed. The routines performed in the self test operation include a CPU test, a RAM test, a real time clock test, a communication controller loop-back test, a ROM signature calculation, a controller I/O test, a system configuration map compilation, and a status display routine. |
