APPARATUS FOR SYNCHRONIZING FEEDBACK PATH CLOCK IN CASCADE BUS SYSTEM

摘要

PURPOSE: A feedback path clock synchronizing apparatus is provided to correspond a timing between a clock transferred in a forward direction and a signal fed back in a backward direction. CONSTITUTION: A feedback path clock synchronizing apparatus a buffer(102) which buffers a clock supplied forward through a connector(101). A first data latch(103) latches input data in response to the clock from the buffer(102), and a second data latch(104) latches output data of the first data latch(103) in response to the clock. A buffer(106) receives and buffers the forward clock of the buffer(102), and a third data latch(107) latches forward output data of the second data latch(104) in response to a clock from the buffer(106). A fourth data latch(108) latches reverse data in response to the clock from the buffer(106). A fifth data latch(109) latches reverse data obtained by the data latch(108) in response to the reverse clock through the connector(105). A first-in first-out(110) records data latched in the data latch(109) according to the forward clock transferred through the connector(105), and reads the recorded data according the forward clock from the buffer(102). A sixth data latch(111) latches and outputs data from the first-in first-out(110) according to the forward clock from the buffer(102).