| 摘要 |
PURPOSE:To protect data in a storage device by writing an erasure inhibiting flag of a data written in an RAM while describing it together with the data and changing a write address so as to write the data to other area without being erased when the said flag is detected. CONSTITUTION:A flag write circuit 19 is activated by the depression of a flag button 14 of an operating panel 8. The presence of a flag is detected by an inverter 30 of a write control circuit 26 and the change of a write address is conducted by an FF27, an AND circuit 28 and an OR circuit 29. The FF27 is set/reset depending on the H/L level of the most significant bit MSB of the data read from an RAM 32. The RAM 32 transmits a data by the designation of the address. When the MSB is logical 0, an AND circuit 30a is activated and the mode enters the write operation. When MSB is logical 1, the write operation is not obtained, an AND circuit 30b is activated, a terminal Q of the FF27 goes to H and the read is continued successively until a data without the flag is read and the FF27 is reset. When the MSB goes to logical 0, the write operation is attained and the FF27 is reset at the same time. |
